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FPT University|e-Resources > Bài báo khoa học (Scientific Articles) > Articles published by FPT lecturers >
Please use this identifier to cite or link to this item: /handle/123456789/2078

Title: High-Level Modeling of a Novel Reconfigurable Network-on-Chip Router
Authors: Le Van, Thanh Vu
Phan, Hai Phong
Tran, Xuan Tu
Keywords: High-Level Modeling
Novel Reconfigurable
Network-on-Chip
Router
Issue Date: 13-Mar-2014
Abstract: This paper presents a novel router architecture for implementing a Reconfigurable Network- on-Chip (RNoC) at high level design using SystemC language. RNoC is an adaptive NoC- based system-on-chip providing a dynamic reconfigurable communication mechanism. By adding a virtual port--named Routing Modification port--into the conventional router architecture, the network router will be able to route communication data flexibly whenever the target routing path is blocked, by unwanted defects or intently by a software ...
Description: 12 pages
URI: http://ds.libol.fpt.edu.vn/handle/123456789/2078
Appears in Collections:Articles published by FPT lecturers

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