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FPT University|e-Resources > Bài báo khoa học (Scientific Articles) > Articles published by FPT lecturers >
Please use this identifier to cite or link to this item: /handle/123456789/2081

Title: Multi-level Design Methodology using SystemC and VHDL for JPEG Encoder
Authors: Bui, Duy Hieu
Tran, Xuan Tu
Keywords: SystemC
VHDL
Co-design
Co-simulation
JPEG encoder
Issue Date: 8-Aug-2011
Abstract: Nowadays, System-on-Chip (SoC) systems are becoming more and more complex and need more time to model, simulate and verification. To reduce the complexity of the system and to boost development time, a new design methodology is required. Along with SystemC library, multi-level abstraction design methodology is proposed as the key concept in SoC design. In this paper, the authors apply this methodology to model and simulate a JPEG encoder using the combination of SystemC and VHDL to explore the architecture and ...
Description: 4 pages
URI: http://ds.libol.fpt.edu.vn/handle/123456789/2081
Appears in Collections:Articles published by FPT lecturers

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